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Muvee Reveal X Software Free Style Pack Download DownloadIn semiconductor processing, various electrical circuits including interconnect structures, diodes, transistors, etc. are formed on a semiconductor substrate (e.g., silicon wafer). Typically, thin insulative layers of dielectric material (e.g., silicon dioxide) are formed on the semiconductor substrate, followed by the formation of one or more conductive layers on the insulative layers. Conductive layers are used for wiring, interconnects, etc. to electrically connect these electrical circuits to each other and other electrical components. For example, conductive layers are used for contact plugs, interconnection vias, gate contact, etc. One challenge that is continually encountered in semiconductor processing is that the interconnects formed in the various conductive layers are not always formed uniformly, resulting in non-uniformity of electrical characteristics (e.g., electrical resistance) in the semiconductor processing. For example, in some semiconductor processes, the electrical resistance of the interconnects is higher than desired. Typically, this may be the case where the semiconductor substrate is formed with a high density of interconnects, or when the dielectric material (e.g., silicon dioxide) of the semiconductor substrate has a non-uniform thickness across the semiconductor substrate. In many instances, it is possible to reduce the electrical resistance of the interconnects by adding an additional layer of conductive material above the conductive layer containing the interconnects. This additional layer of conductive material is referred to as an “overlay” layer. Overlay layers are often formed of metals, which are generally used in semiconductor processing to reduce electrical resistance. However, due to complexity and expense of the deposition processes used to form these metal overlay layers, most semiconductor processes use copper for the conductive material of the interconnects and copper for the conductive material of the overlay layers. However, the relatively high cost of copper, as well as the relatively high resistance of some copper alloys, results in significant electrical resistance of the interconnects and overlay layers. For example, copper has a resistance that is at least about 1.5 times that of aluminum, which is generally the most common material used for the conductive material of the interconnects and overlay layers. Therefore, it would be desirable to have a method for making an interconnect structure that reduces the electrical resistance of the interconnects and

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